A system-on-a-chip (SoC) integrates all components of a computer or other electronic system into a single integrated circuit or chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions. A typical SoC can include a microcontroller, microprocessor or digital signal processor (DSP) cores. Some SoCs, referred to as multiprocessor System-on-Chip (MPSoC), include more than one processor core. Other components include memory blocks such as ROM, RAM, EEPROM and Flash, timing sources including oscillators and phase-locked loops, peripherals including counter-timers, real-time timers and power-on reset generators, external interfaces including industry standards such as USB, FireWire, Ethernet, USART, SPI, analog interfaces such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), and voltage regulators and power management circuits.
These components are connected by either a proprietary or industry-standard bus such as the Advanced Microcontroller Bus Architecture (AMBA) bus, or by DMA controllers which route data directly between external interfaces and memory, bypassing the processor core and thereby increasing the data throughput of the SoC. Example applications for SoC include music players and video game consoles, among many other possible applications.
Moreover, silicon process technology scaling has enabled very high degrees of integration resulting in complex SoC designs, spanning designs from complex chip multi-processors to highly integrated embedded systems. The SoC building blocks—referred to as Intellectual Property (IP) blocks—used by a manufacturer may come from a variety of internal and external sources. Regardless of the SoC IP block source, the internal operation of modules and associated corner cases may not be well understood or transparent to the SoC designers. Furthermore, with the high degree of integration among IP blocks, and with the increasing amount of concurrent execution, understanding the interactions between various modules or blocks has become very difficult. SoC designers are often forced to make educated guesses about the way the different modules impact each other's performance. This is further complicated by third party vendors of IP blocks that do not provide source code access for their modules. All of these factors make performance analysis of SoCs extremely difficult.
Improved techniques are need for optimizing SoC designs.